`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    10:31:51 03/14/2012 
// Design Name: 
// Module Name:    Serial_input 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module Serial_input(
    input Serial_input,
    output [5:0] ID_RAMDATA,
    output [7:0] ID_RAMADDR,
    input clk_50Mhz,
    output baud_clock,
    output ID_RAMENWR
    );


endmodule
